Iis2dh

Notes on STMicro IIS22DH high frequency MEMS accelerometer.

• https://community.st.com/s/question/0D50X00009XkdfV/understanding-acceleration-data-from-iis2dh (Excerpt from this post copied to section below . . .)

A promising project on Github:

• https://github.com/STMicroelectronics/iis2dh
• https://github.com/STMicroelectronics/STMems_Standard_C_drivers/tree/master/iis2dh_STdC/examples
• https://github.com/STMicroelectronics/STMems_Standard_C_drivers/blob/master/iis2dh_STdC/examples/iis2dh_read_data_polling.c

Symbols in the polling code example from STMicroelectronic/iis2dh repo are defined in a sub-part of sdk-nrf modules/hal/ project space:

guest@ubuntu-vm:~/embedded/z3-on-var/modules/hal/st$ grep -nr IIS2DH_2g ./*
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.h:742:  IIS2DH_2g   = 0,
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:636:    case IIS2DH_2g:
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:637:      *val = IIS2DH_2g;
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:649:      *val = IIS2DH_2g;

guest@ubuntu-vm:~/embedded/z3-on-var/modules/hal/st$ grep -nr IIS2DH_ODR_1Hz ./*
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.h:707:  IIS2DH_ODR_1Hz                         = 0x01,
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:402:    case IIS2DH_ODR_1Hz:
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:403:      *val = IIS2DH_ODR_1Hz;

guest@ubuntu-vm:~/embedded/z3-on-var/modules/hal/st$ grep -nr IIS2DH_TEMP_ENABLE ./*
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.h:692:  IIS2DH_TEMP_ENABLE   = 3,
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:285:    case IIS2DH_TEMP_ENABLE:
./sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.c:286:      *val = IIS2DH_TEMP_ENABLE;
guest@ubuntu-vm:~/embedded/z3-on-var/modules/hal/st$ grep -nr PROPERTY_ENABLE ./*

And really the above project is pulled in to Nordic's sdk-nrf. Looks to be at a slightly older, or at least different version, but driver header and sources at https://github.com/STMicroelectronics/iis2dh are the same as in the STMicro hal code in Nordic sdk-nrf v1.6.1.

IIS2DH Control Registers As C Structures

An excerpt from Nordic sdk-nrf modules/hal/st/sensor/stmemsc/iis2dh_STdC/driver/iis2dh_reg.h:

#define IIS2DH_CTRL_REG4             0x23U
typedef struct {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  uint8_t sim               : 1;
  uint8_t st                : 2;
  uint8_t hr                : 1;
  uint8_t fs                : 2;
  uint8_t ble               : 1;
  uint8_t bdu               : 1;
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
  uint8_t bdu               : 1;
  uint8_t ble               : 1;
  uint8_t fs                : 2;
  uint8_t hr                : 1;
  uint8_t st                : 2;
  uint8_t sim               : 1;
#endif /* DRV_BYTE_ORDER */
} iis2dh_ctrl_reg4_t;

^ Configuration Post from ST Micro Forum

Excerpt on accelerator configurations from this developer: mhackney (Community Member) Edited by ST Community July 21, 2018 at 5:26 PM Posted on January 02, 2017 at 16:21

Ok, I overlooked the data sheet that Low Power mode is 8-bit data output. But that still does not explain why the data is not left aligned?

Also, here is my complete configuration to sanity check:

// setup CTRL_REG1

accelerometer_write(CTRL_REG1, 0b10011100); // ODR 5.376kHz in LPMode [7-4] Low power enable [3] Z enable [2]

// setup CTRL_REG2

accelerometer_write(CTRL_REG2, 0b00110001); //

// setup CTRL_REG3

accelerometer_write(CTRL_REG3, 0b01000000); // AOI (And Or Interrupt) on INT1 en [6]

// setup CTRL_REG6

accelerometer_write(CTRL_REG6, 0b00000000); //

// setup CTRL_REG4

accelerometer_write(CTRL_REG4, 0b00110000); // Full-scale selection 16G [5-4]

// setup CTRL_REG5

accelerometer_write(CTRL_REG5, 0b01001010); // FIFO enable [6] Latch INT1 [3]

// setup INT1_CFG

accelerometer_write(INT1_CFG, 0b00100000); // ZHIE enabled [5]

// setup INT1_THS

accelerometer_write(INT1_THS, Z_PROBE_SENSITIVITY); // 40

// setup INT1_DURATION

accelerometer_write(INT1_DURATION, 0);