Difference between revisions of "Nxp chip library routines"
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1019 grep -n IO_TMR32B1_SetPwmLevel ./* | 1019 grep -n IO_TMR32B1_SetPwmLevel ./* | ||
1020 history | 1020 history | ||
+ | |||
+ | |||
+ | Finding 6: | ||
+ | |||
+ | <pre> | ||
+ | 252 void IO_TMR32B1_SetPwmLevel(tmr32b1_chan_t chan, float duty)^M | ||
+ | 253 {^M | ||
+ | 254 uint32_t counts;^M | ||
+ | 255 ^M | ||
+ | 256 // Convert float duty cycle to integer counts for the counter/^M | ||
+ | 257 // timer.^M | ||
+ | 258 counts = (uint32_t)(duty * mResolution);^M | ||
+ | 259 ^M | ||
+ | 260 // Counter counts the other way, so invert.^M | ||
+ | 261 counts = mResolution - counts;^M | ||
+ | 262 ^M | ||
+ | 263 // CON_TxChar(' ');^M | ||
+ | 264 // CON_TxHexWord((uint16_t)counts);^M | ||
+ | 265 ^M | ||
+ | 266 switch(chan)^M | ||
+ | 267 {^M | ||
+ | 268 case TMR32B1_CHAN_0:^M | ||
+ | 269 LPC_TMR32B1->MR0 = counts;^M | ||
+ | 270 break;^M | ||
+ | 271 ^M | ||
+ | 272 case TMR32B1_CHAN_1:^M | ||
+ | 273 LPC_TMR32B1->MR1 = counts;^M | ||
+ | 274 break;^M | ||
+ | 275 ^M | ||
+ | 276 case TMR32B1_CHAN_2:^M | ||
+ | 277 LPC_TMR32B1->MR2 = counts;^M | ||
+ | 278 break;^M | ||
+ | 279 ^M | ||
+ | 280 default: FATAL(0); break;^M | ||
+ | 281 }^M | ||
+ | 282 }^M | ||
+ | </pre> | ||
Revision as of 23:12, 26 October 2018
CMSIS Library Routines and Details,
LPC1xxx Board Routines
notes started 2018-10-25 THU
LPC11U14 board routines . . .
First search, looking for how NXP demo toggles a given GPIO:
user:~/Downloads/nxp/lpcopen$ grep -nr Board_LED_Toggle ./* ./nxp_lpcxpresso_11u14_board_lib/src/board.c:137:void Board_LED_Toggle(uint8_t LEDNumber) ./nxp_lpcxpresso_11u14_board_lib/inc/board_api.h:112:void Board_LED_Toggle(uint8_t LEDNumber); ./nxp_lpcxpresso_11u14_periph_clkout/example/src/clkout.c:77: Board_LED_Toggle(0); ./nxp_lpcxpresso_11u14_periph_pinint/example/src/pinint.c:187: Board_LED_Toggle(0); ./nxp_lpcxpresso_11u14_periph_uart/example/src/uart.c:135: Board_LED_Toggle(0);/* Toggle LED if the TX FIFO is full */ ./nxp_lpcxpresso_11u14_periph_watchdog/example/src/watchdog.c:65: Board_LED_Toggle(0); ./nxp_lpcxpresso_11u14_periph_watchdog/example/src/watchdog.c:72: Board_LED_Toggle(0);
The routine itself in file ~/Downloads/nxp/lpcopen/nxp_lpcxpresso_11u14_board_lib/src/board.c
:
137 void Board_LED_Toggle(uint8_t LEDNumber) 138 {^M 139 if (LEDNumber == 0)^M 140 Chip_GPIO_SetPinToggle(LPC_GPIO, 0, 7); 141 }
Next search:
$ grep -nr Chip_GPIO_SetPinToggle ./* user:~/Downloads/nxp/lpcopen$ grep -nr Chip_GPIO_SetPinToggle ./* ./lpc_chip_11uxx_lib/inc/gpio_11xx_1.h:447:STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin) Binary file ./nxp_lpcxpresso_11u14_board_lib/src/.board.c.swp matches ./nxp_lpcxpresso_11u14_board_lib/src/board.c:140: Chip_GPIO_SetPinToggle(LPC_GPIO, 0, 7);
And the lower level routine itself in file ./lpc_chip_11uxx_lib/inc/gpio_11xx_1.h
:
438 /**^M 439 * @brief Toggle an individual GPIO output pin to the opposite state^M 440 * @param pGPIO : The base of GPIO peripheral on the chip^M 441 * @param port : GPIO Port number where @a pin is located^M 442 * @param pin : pin number (0..n) to toggle^M 443 * @return None^M 444 * @note Any bit set as a '0' will not have it's state changed. This only^M 445 * applies to ports configured as an output.^M 446 */^M 447 STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)^M 448 {^M 449 pGPIO->NOT[port] = (1 << pin);^M 450 }^M
So where is pGPIO
defined?
^ LPC_GPIO_TYPEDEF
$ pwd .../Firmware/V1_1$ $ grep -nr LPC_GPIO_TypeDef ./* | grep LPC11 ./LPC11xx.h:295:} LPC_GPIO_TypeDef; ./LPC11xx.h:490:#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) ./LPC11xx.h:491:#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) ./LPC11xx.h:492:#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) ./LPC11xx.h:493:#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE ) Binary file ./Release/Obj/sysconfig_LPC11xx.pbi matches ./initial-firmware-works/Unit_Test/apptask/LPC11xx.h:192:} LPC_GPIO_TypeDef; ./initial-firmware-works/Unit_Test/apptask/LPC11xx.h:204:extern LPC_GPIO_TypeDef gpio; ./initial-firmware-works/Unit_Test/px3_system/LPC11xx.h:192:} LPC_GPIO_TypeDef; ./initial-firmware-works/Unit_Test/px3_system/LPC11xx.h:204:extern LPC_GPIO_TypeDef gpio; ./initial-firmware-works/FloatingPoint/LPC11xx.h:295:} LPC_GPIO_TypeDef; ./initial-firmware-works/FloatingPoint/LPC11xx.h:490:#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) ./initial-firmware-works/FloatingPoint/LPC11xx.h:491:#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) ./initial-firmware-works/FloatingPoint/LPC11xx.h:492:#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) ./initial-firmware-works/FloatingPoint/LPC11xx.h:493:#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE ) ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:295:} LPC_GPIO_TypeDef; ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:490:#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:491:#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:492:#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:493:#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
Using Timers As Pulsewidth Modulators
Findings to go here later . . .