Difference between revisions of "Device tree from scratch"
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Looking at the `reg` property we find 0x17000 value called out. From personal memory we know this is the memory mapped address or offset from some base address. We'll look for this offset in Nordic's datasheet on the nRF9160 application core . . . | Looking at the `reg` property we find 0x17000 value called out. From personal memory we know this is the memory mapped address or offset from some base address. We'll look for this offset in Nordic's datasheet on the nRF9160 application core . . . | ||
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| + | <!-- comentario --> | ||
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| + | == Reference == | ||
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| + | <ol> | ||
| + | <li> https://infocenter.nordicsemi.com/topic/ps_nrf9160/dppi.html Nordic Semi documentation on Distributed Programmable Peripheral Interconnect | ||
| + | </ol> | ||
Revision as of 20:39, 15 August 2022
2022-08-15 Monday
How to Create Device Tree Files for New MCUs
^ Overview
Starting local article on how to craft a correct and complete device tree file set for an MCU not yet supported by Zephyr RTOS. First notes here will reference examples of device tree source files various supported MCUs, plus corresponding datasheet sections pertaining to given MCUs.
^ Nordic Semi nRF9160
Not sure for what DPPI stands, but this device in nRF9160 SoC device tree file `` has a simple node entry. Code excerpt from https://github.com/zephyrproject-rtos/zephyr/blob/main/dts/arm/nordic/nrf9160_common.dtsi#L31:
dppic: dppic@17000 {
compatible = "nordic,nrf-dppic";
reg = <0x17000 0x1000>;
status = "okay";
};
Looking at the `reg` property we find 0x17000 value called out. From personal memory we know this is the memory mapped address or offset from some base address. We'll look for this offset in Nordic's datasheet on the nRF9160 application core . . .
Reference
- https://infocenter.nordicsemi.com/topic/ps_nrf9160/dppi.html Nordic Semi documentation on Distributed Programmable Peripheral Interconnect
