Difference between revisions of "Spi device tree source code"
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− | == [[#top]] SPI dts examples from Zephyr boards == | + | == [[#top|^]] SPI dts examples from Zephyr boards == |
In Zephyr RTOS' supported board dts files we find SPI peripherals defined for several boards. Here are excerpts | In Zephyr RTOS' supported board dts files we find SPI peripherals defined for several boards. Here are excerpts |
Revision as of 19:32, 12 August 2022
2022-08-11 Thursday
Notes on SPI device tree source, with goal to add SPI device to modified RPi Pico DTS files, which build firmware to run on Sparkfun DEV-18288 board. An interesting link at Nordic Semi documentation pages, link to page which mentions Synopsis as designer of designware-spi device bindings and related bindings is:
- https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.5.1/zephyr/reference/devicetree/bindings.html
NEED TO INVESTIGATE files in following Zephyr SDK directories:
`zephyr/soc/arm/rpi_pico` and `zephyr/soc/arm/rpi_pico/rp2`
Contents
^ SPI dts examples from Zephyr boards
In Zephyr RTOS' supported board dts files we find SPI peripherals defined for several boards. Here are excerpts
Excerpt 1 - zephyr/boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts
142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 |
&spi3 { compatible = "nordic,nrf-spim"; status = "okay"; cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; pinctrl-0 = <&spi3_default>; pinctrl-1 = <&spi3_sleep>; pinctrl-names = "default", "sleep"; w25q32jv: w25q32jv@0 { compatible = "jedec,spi-nor"; label = "W25Q32JV"; reg = <0>; spi-max-frequency = <40000000>; wp-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; hold-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; size = <0x2000000>; has-dpd; t-enter-dpd = <3000>; t-exit-dpd = <30000>; jedec-id = [ ef 40 16 ]; }; }; |
a |
81 spi3_default: spi3_default { 82 group1 { 83 psels = <NRF_PSEL(SPIM_SCK, 0, 11)>, 84 <NRF_PSEL(SPIM_MOSI, 0, 9)>, 85 <NRF_PSEL(SPIM_MISO, 0, 28)>; 86 }; 87 }; 88 89 spi3_sleep: spi3_sleep { 90 group1 { 91 psels = <NRF_PSEL(SPIM_SCK, 0, 11)>, 92 <NRF_PSEL(SPIM_MOSI, 0, 9)>, 93 <NRF_PSEL(SPIM_MISO, 0, 28)>; 94 low-power-enable; 95 }; 96 }; |
^ edit point dts excerpt 2
Excerpt 2 - zephyr/boards/arm/96b_carbon_nrf51/96b_carbon_nrf51.dts and 96b_carbon_nrf51-pinctrl.dtsi
47 48 49 50 51 52 53 54 55 56 |
&spi1 { compatible = "nordic,nrf-spis"; status = "okay"; def-char = <0x00>; pinctrl-0 = <&spi1_default>; pinctrl-names = "default"; bt-hci@0 { compatible = "zephyr,bt-hci-spi-slave"; reg = <0>; irq-gpios = <&gpio0 28 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; }; }; |
37 38 39 40 41 42 43 44 |
spi1_default: spi1_default { group1 { psels = <NRF_PSEL(SPIS_SCK, 0, 7)>, <NRF_PSEL(SPIS_MOSI, 0, 0)>, <NRF_PSEL(SPIS_MISO, 0, 30)>, <NRF_PSEL(SPIS_CSN, 0, 25)>; }; }; |
^ edit point dts excerpt 3
Excerpt 3 - zephyr/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dts and stm32l562e_dk_common.dtsi
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Looks like pin control names value 'default' may be defined in Kconfig.default for this board . . . |
114 115 116 117 118 119 120 121 122 123 124 125 126 127 |
&spi1 { pinctrl-0 = <&spi1_sck_pg2 &spi1_miso_pg3 &spi1_mosi_pg4>; pinctrl-names = "default"; cs-gpios = <&gpiog 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; status = "okay"; spbtle-rf@0 { compatible = "zephyr,bt-hci-spi"; reg = <0>; irq-gpios = <&gpiog 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; reset-gpios = <&gpiog 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; spi-max-frequency = <2000000>; label = "SPBTLE-RF"; }; }; |
^ edit point dts excerpt 4
Excerpt 4 -
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^ edit point dts excerpt 5
Excerpt 5 -
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^ edit point dts excerpt 5
From the zephyr/boards/arm/rpi_pico/doc/index.rst file:
== [[#top|^]] edit point dts excerpt 5 == 37 Raspberry Pi Pico (Image courtesy of Raspberry Pi) 38 39 Supported Features 40 ================== 41 42 The rpi_pico board configuration supports the following 43 hardware features: 44 45 .. list-table:: 46 :header-rows: 1 47 48 * - Peripheral 49 - Kconfig option 50 - Devicetree compatible 51 * - NVIC 52 - N/A 53 - :dtcompatible:`arm,v6m-nvic` 54 * - UART 55 - :kconfig:option:`CONFIG_SERIAL` 56 - :dtcompatible:`rpi,pico-uart` 57 * - GPIO 58 - :kconfig:option:`CONFIG_GPIO` 59 - :dtcompatible:`rpi,pico-gpio` 60 * - I2C 61 - :kconfig:option:`CONFIG_I2C` 62 - :dtcompatible:`snps,designware-i2c` 63 * - USB Device 64 - :kconfig:option:`CONFIG_USB_DEVICE_STACK` 65 - :dtcompatible:`raspberrypi,pico-usbd` 66 * - HWINFO 67 - :kconfig:option:`CONFIG_HWINFO` 68 - N/A 69 70 Programming and Debugging 71 ************************* 72 73 Flashing
There is a clue here on line 62 "- :dtcompatible:`snps,designware-i2c`". This is for I2C, but a search via startpage.com for "snps,designware-spi" gives a first or near first result of:
This still leaves the open question, where are RPi Pico's I2C and SPI driver implementations in Zephyr RTOS release 3.1.0?
^ YAML device bindings files
To support a typical development kit or custom board with multiple peripherals we need a device bindings file comparable to this ... bindings file:
- ~/projects-sandbox/workspace-for-rpi/zephyr/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160.yaml
identifier: nrf9160dk_nrf9160 name: nRF9160-DK-NRF9160 type: mcu arch: arm toolchain: - gnuarmemb - xtools - zephyr ram: 88 flash: 256 supported: - arduino_gpio - arduino_i2c - gpio - i2c - pwm - spi - watchdog - counter
Or possibly this bindings file by Jared Wolff of Circuit Dojo:
^ STMicro device tree SPI documentation
The following STMicro article goes into good detail on their SPI controllers in STM32Fxx family parts, and even gives device tree excerpts. These apparently are used in Linux based projects where Linux kernel and OS run on a 32-bit ST MCU.
A device tree excerpt from the first link just above:
spi1: spi@44004000 { #address-cells = <1>; #size-cells = <0>; compatible = "st,stm32h7-spi"; reg = <0x44004000 0x400>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc SPI1_K>; resets = <&rcc SPI1_R>; dmas = <&dmamux1 37 0x400 0x05>, <&dmamux1 38 0x400 0x05>; dma-names = "rx", "tx"; power-domains = <&pd_core>; status = "disabled"; }; Warning white.png Warning This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.