Difference between revisions of "Nxp chip library routines"

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m (→‎Using Timers As Pulsewidth Modulators)
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  1019  grep -n IO_TMR32B1_SetPwmLevel ./*
 
  1019  grep -n IO_TMR32B1_SetPwmLevel ./*
 
  1020  history
 
  1020  history
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 +
 +
Finding 6:
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 +
<pre>
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    252 void IO_TMR32B1_SetPwmLevel(tmr32b1_chan_t chan, float duty)^M
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    253 {^M
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    254    uint32_t counts;^M
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    255 ^M
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    256    // Convert float duty cycle to integer counts for the counter/^M
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    257    // timer.^M
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    258    counts = (uint32_t)(duty * mResolution);^M
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    259 ^M
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    260    // Counter counts the other way, so invert.^M
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    261    counts = mResolution - counts;^M
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    262 ^M
 +
    263 //    CON_TxChar(' ');^M
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    264 //    CON_TxHexWord((uint16_t)counts);^M
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    265 ^M
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    266    switch(chan)^M
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    267    {^M
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    268        case TMR32B1_CHAN_0:^M
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    269            LPC_TMR32B1->MR0 = counts;^M
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    270            break;^M
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    271 ^M
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    272        case TMR32B1_CHAN_1:^M
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    273            LPC_TMR32B1->MR1 = counts;^M
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    274            break;^M
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    275 ^M
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    276        case TMR32B1_CHAN_2:^M
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    277            LPC_TMR32B1->MR2 = counts;^M
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    278            break;^M
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    279 ^M
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    280        default: FATAL(0); break;^M
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    281    }^M
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    282 }^M
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</pre>
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 +
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<pre>
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 +
In file <code>io_conf_lqfp48.c</code>:
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 +
  LPC_IOCON->PIO1_1 = P1_1_CONFIG | A2D_RESERVED;
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 +
 +
In file <code>io_def_0C.h</code>:
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 +
  #define P1_1_CONFIG    IO_CONFIG(P1_1, FUNC_CT32B1_MAT0, MODE_FLOAT, HYST_DIS)
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 +
 +
In file <code>io_conf_lqfp48.h</code>:
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 +
  #define IO_CONFIG(PORT, FUNC, MODE, HYST) (FUNC ## _ ## PORT | MODE | HYST)
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</pre>
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 +
 +
 +
2018-10-31
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 +
How do these signal routines from source file drivers.c affect firmware operation?  They all appear to be empty routines, without any statements to execute:
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 +
<pre>
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    265 //*********************************************************************^M
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    266 //      Timer Signals^M
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    267 //* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *^M
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    268 ^M
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    269 #if(CFG_ENABLE_TIMER_16B0 != 0)^M
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    270 void Signal_TMR16B0_MAT0_Interrupt(void){}^M
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    271 void Signal_TMR16B0_MAT1_Interrupt(void){}^M
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    272 void Signal_TMR16B0_MAT2_Interrupt(void){}^M
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    273 void Signal_TMR16B0_MAT3_Interrupt(void){}^M
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    274 #endif^M
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    275 ^M
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    276 #if(CFG_ENABLE_TIMER_16B1 != 0)^M
 +
    277 void Signal_TMR16B1_MAT0_Interrupt(void){}^M
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    278 void Signal_TMR16B1_MAT1_Interrupt(void){}^M
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    279 void Signal_TMR16B1_MAT2_Interrupt(void){}^M
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    280 void Signal_TMR16B1_MAT3_Interrupt(void){}^M
 +
    281 #endif^M
 +
    282 ^M
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    283 #if(CFG_ENABLE_TIMER_32B0 != 0)^M
 +
    284 void Signal_TMR32B0_MAT0_Interrupt(void){}^M
 +
    285 void Signal_TMR32B0_MAT1_Interrupt(void){}^M
 +
    286 void Signal_TMR32B0_MAT2_Interrupt(void){}^M
 +
    287 void Signal_TMR32B0_MAT3_Interrupt(void){}^M
 +
    288 #endif^M
 +
    289 ^M
 +
    290 #if(CFG_ENABLE_TIMER_32B1 != 0)^M
 +
    291 void Signal_TMR32B1_MAT0_Interrupt(void){}^M
 +
    292 void Signal_TMR32B1_MAT1_Interrupt(void){}^M
 +
    293 void Signal_TMR32B1_MAT2_Interrupt(void){}^M
 +
    294 void Signal_TMR32B1_MAT3_Interrupt(void){}^M
 +
    295 #endif^M
 +
</pre>
 +
  
  

Latest revision as of 20:57, 31 October 2018

CMSIS Library Routines and Details,
LPC1xxx Board Routines
notes started 2018-10-25 THU


LPC11U14 board routines . . .


First search, looking for how NXP demo toggles a given GPIO: 

user:~/Downloads/nxp/lpcopen$ grep -nr Board_LED_Toggle ./*

./nxp_lpcxpresso_11u14_board_lib/src/board.c:137:void Board_LED_Toggle(uint8_t LEDNumber)
./nxp_lpcxpresso_11u14_board_lib/inc/board_api.h:112:void Board_LED_Toggle(uint8_t LEDNumber);
./nxp_lpcxpresso_11u14_periph_clkout/example/src/clkout.c:77:		Board_LED_Toggle(0);
./nxp_lpcxpresso_11u14_periph_pinint/example/src/pinint.c:187:		Board_LED_Toggle(0);
./nxp_lpcxpresso_11u14_periph_uart/example/src/uart.c:135:				Board_LED_Toggle(0);/* Toggle LED if the TX FIFO is full */
./nxp_lpcxpresso_11u14_periph_watchdog/example/src/watchdog.c:65:		Board_LED_Toggle(0);
./nxp_lpcxpresso_11u14_periph_watchdog/example/src/watchdog.c:72:	Board_LED_Toggle(0);

The routine itself in file ~/Downloads/nxp/lpcopen/nxp_lpcxpresso_11u14_board_lib/src/board.c: 

    137 void Board_LED_Toggle(uint8_t LEDNumber)
    138 {^M
    139         if (LEDNumber == 0)^M
    140                 Chip_GPIO_SetPinToggle(LPC_GPIO, 0, 7);
    141 }

Next search: 

$ grep -nr Chip_GPIO_SetPinToggle ./*

user:~/Downloads/nxp/lpcopen$ grep -nr Chip_GPIO_SetPinToggle ./*
./lpc_chip_11uxx_lib/inc/gpio_11xx_1.h:447:STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
Binary file ./nxp_lpcxpresso_11u14_board_lib/src/.board.c.swp matches
./nxp_lpcxpresso_11u14_board_lib/src/board.c:140:		Chip_GPIO_SetPinToggle(LPC_GPIO, 0, 7);

And the lower level routine itself in file ./lpc_chip_11uxx_lib/inc/gpio_11xx_1.h: 

    438 /**^M
    439  * @brief       Toggle an individual GPIO output pin to the opposite state^M
    440  * @param       pGPIO   : The base of GPIO peripheral on the chip^M
    441  * @param       port    : GPIO Port number where @a pin is located^M
    442  * @param       pin             : pin number (0..n) to toggle^M
    443  * @return      None^M
    444  * @note        Any bit set as a '0' will not have it's state changed. This only^M
    445  * applies to ports configured as an output.^M
    446  */^M
    447 STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)^M
    448 {^M
    449         pGPIO->NOT[port] = (1 << pin);^M
    450 }^M

So where is pGPIO defined?


^ LPC_GPIO_TYPEDEF

$ pwd

.../Firmware/V1_1$

$ grep -nr LPC_GPIO_TypeDef ./* | grep LPC11

./LPC11xx.h:295:} LPC_GPIO_TypeDef;
./LPC11xx.h:490:#define LPC_GPIO0             ((LPC_GPIO_TypeDef   *) LPC_GPIO0_BASE )
./LPC11xx.h:491:#define LPC_GPIO1             ((LPC_GPIO_TypeDef   *) LPC_GPIO1_BASE )
./LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
./LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )
Binary file ./Release/Obj/sysconfig_LPC11xx.pbi matches
./initial-firmware-works/Unit_Test/apptask/LPC11xx.h:192:} LPC_GPIO_TypeDef;
./initial-firmware-works/Unit_Test/apptask/LPC11xx.h:204:extern LPC_GPIO_TypeDef gpio;
./initial-firmware-works/Unit_Test/px3_system/LPC11xx.h:192:} LPC_GPIO_TypeDef;
./initial-firmware-works/Unit_Test/px3_system/LPC11xx.h:204:extern LPC_GPIO_TypeDef gpio;
./initial-firmware-works/FloatingPoint/LPC11xx.h:295:} LPC_GPIO_TypeDef;
./initial-firmware-works/FloatingPoint/LPC11xx.h:490:#define LPC_GPIO0             ((LPC_GPIO_TypeDef   *) LPC_GPIO0_BASE )
./initial-firmware-works/FloatingPoint/LPC11xx.h:491:#define LPC_GPIO1             ((LPC_GPIO_TypeDef   *) LPC_GPIO1_BASE )
./initial-firmware-works/FloatingPoint/LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
./initial-firmware-works/FloatingPoint/LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:295:} LPC_GPIO_TypeDef;
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:490:#define LPC_GPIO0             ((LPC_GPIO_TypeDef   *) LPC_GPIO0_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:491:#define LPC_GPIO1             ((LPC_GPIO_TypeDef   *) LPC_GPIO1_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )


Using Timers As Pulsewidth Modulators

Findings to go here later . . .



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