Difference between revisions of "Multi-core"
From Wiki at Neela Nurseries
m (NXP LPC55S69 system clock settings HAL source file) |
m (NXP mailbox HAL files) |
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$ vi ./hal/nxp/mcux/mcux-sdk/devices/LPC55S69/drivers/fsl_clock.h | $ vi ./hal/nxp/mcux/mcux-sdk/devices/LPC55S69/drivers/fsl_clock.h | ||
+ | <!-- comentario --> | ||
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+ | == [[#top|^]] NXP mailbox HAL files == | ||
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+ | modules/hal/nxp/mcux/mcux-sdk/drivers/mailbox/fsl_mailbox.h | ||
<!-- comentario --> | <!-- comentario --> |
Revision as of 00:39, 16 December 2022
In Zephyr 3.2.0 see `zephyr/include/zephyr/drivers/ipm.h` for some starting points to understand inter-processor messaging.
One of two or three Zephyr 3.2.0 sample apps which touch on multi-core firmware design:
- ./subsys/ipc/openamp/boards/lpcxpresso55s69_cpu0.overlay
^ Zephyr sys init run levels
Likely for another local article, excerpt from `zephyr/include/zephyr/init.h`:
18 /* 19 * System initialization levels. The PRE_KERNEL_1 and PRE_KERNEL_2 levels are 20 * executed in the kernel's initialization context, which uses the interrupt 21 * stack. The remaining levels are executed in the kernel's main task. 22 */ 23 24 #define _SYS_INIT_LEVEL_PRE_KERNEL_1 0 25 #define _SYS_INIT_LEVEL_PRE_KERNEL_2 1 26 #define _SYS_INIT_LEVEL_POST_KERNEL 2 27 #define _SYS_INIT_LEVEL_APPLICATION 3 28 29 #ifdef CONFIG_SMP 30 #define _SYS_INIT_LEVEL_SMP 4 31 #endif
^ General MCU bring-up
NXP LPC55S69 system clock settings HAL source file:
$ vi ./hal/nxp/mcux/mcux-sdk/devices/LPC55S69/drivers/fsl_clock.h
^ NXP mailbox HAL files
modules/hal/nxp/mcux/mcux-sdk/drivers/mailbox/fsl_mailbox.h