Difference between revisions of "Spi device tree source code"

From Wiki at Neela Nurseries
Jump to: navigation, search
m (→‎^ edit point dts excerpt 2)
m (→‎^ edit point dts excerpt 3)
Line 150: Line 150:
 
== [[#top|^]] edit point dts excerpt 3 ==
 
== [[#top|^]] edit point dts excerpt 3 ==
  
−
<i>Excerpt 3 - <i>
+
<i>Excerpt 3 - zephyr/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dts and stm32l562e_dk_common.dtsi<i>
 
{|
 
{|
 +
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 +
<pre>
 +
 +
</pre>
 +
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 +
<pre>
 +
Looks like pin control names value 'default' may be defined in Kconfig.default for this board . . .
 +
</pre>
 
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 
<pre>
 
<pre>
Line 157: Line 165:
 
115
 
115
 
116
 
116
 +
117
 +
118
 +
119
 +
120
 +
121
 +
122
 +
123
 +
124
 +
125
 +
126
 +
127
 
</pre>
 
</pre>
 
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 
| style="background:#ffffff; vertical-align:top; padding:10px;" |
Line 175: Line 194:
 
         };
 
         };
 
};
 
};
−
</pre>
 
−
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 
−
<pre>
 
−
 
−
</pre>
 
−
| style="background:#ffffff; vertical-align:top; padding:10px;" |
 
−
<pre>
 
−
 
 
</pre>
 
</pre>
 
|}
 
|}
−
 
  
 
== [[#top|^]] edit point dts excerpt 4 ==
 
== [[#top|^]] edit point dts excerpt 4 ==

Revision as of 00:00, 12 August 2022

2022-08-11 Thursday

Notes on SPI device tree source, with goal to add SPI device to modified RPi Pico DTS files, which build firmware to run on Sparkfun DEV-18288 board.


SPI dts examples

In Zephyr RTOS' supported board dts files we find SPI peripherals defined for several boards. Here are excerpts

Excerpt 1 - zephyr/boards/arm/sparkfun_thing_plus_nrf9160/sparkfun_thing_plus_nrf9160_common.dts 


142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162



&spi3 {
        compatible = "nordic,nrf-spim";
        status = "okay";
        cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&spi3_default>;
        pinctrl-1 = <&spi3_sleep>;
        pinctrl-names = "default", "sleep";
        w25q32jv: w25q32jv@0 {
                compatible = "jedec,spi-nor";
                label = "W25Q32JV";
                reg = <0>;
                spi-max-frequency = <40000000>;
                wp-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
                hold-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
                size = <0x2000000>;
                has-dpd;
                t-enter-dpd = <3000>;
                t-exit-dpd = <30000>;
                jedec-id = [ ef 40 16 ];
        };
};


a

 81         spi3_default: spi3_default {
 82                 group1 {
 83                         psels = <NRF_PSEL(SPIM_SCK, 0, 11)>,
 84                                 <NRF_PSEL(SPIM_MOSI, 0, 9)>,
 85                                 <NRF_PSEL(SPIM_MISO, 0, 28)>;
 86                 };
 87         };
 88 
 89         spi3_sleep: spi3_sleep {
 90                 group1 {
 91                         psels = <NRF_PSEL(SPIM_SCK, 0, 11)>,
 92                                 <NRF_PSEL(SPIM_MOSI, 0, 9)>,
 93                                 <NRF_PSEL(SPIM_MISO, 0, 28)>;
 94                         low-power-enable;
 95                 };
 96         };


^ edit point dts excerpt 2

Excerpt 2 - zephyr/boards/arm/96b_carbon_nrf51/96b_carbon_nrf51.dts and 96b_carbon_nrf51-pinctrl.dtsi 

47
48
49
50
51
52
53
54
55
56

&spi1 {
        compatible = "nordic,nrf-spis";
        status = "okay";
        def-char = <0x00>;

        pinctrl-0 = <&spi1_default>;
        pinctrl-names = "default";
        bt-hci@0 {
                compatible = "zephyr,bt-hci-spi-slave";
                reg = <0>;
                irq-gpios = <&gpio0 28 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
        };
};

37
38
39
40
41
42
43
44

        spi1_default: spi1_default {
                group1 {
                        psels = <NRF_PSEL(SPIS_SCK, 0, 7)>,
                                <NRF_PSEL(SPIS_MOSI, 0, 0)>,
                                <NRF_PSEL(SPIS_MISO, 0, 30)>,
                                <NRF_PSEL(SPIS_CSN, 0, 25)>;
                };
        };

^ edit point dts excerpt 3

Excerpt 3 - zephyr/boards/arm/stm32l562e_dk/stm32l562e_dk_common.dts and stm32l562e_dk_common.dtsi<i> 



Looks like pin control names value 'default' may be defined in Kconfig.default for this board . . .

114
115
116
117
118
119
120
121
122
123
124
125
126
127

&spi1 {
        pinctrl-0 = <&spi1_sck_pg2 &spi1_miso_pg3 &spi1_mosi_pg4>;
        pinctrl-names = "default";
        cs-gpios = <&gpiog 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
        status = "okay";

        spbtle-rf@0 {
                compatible = "zephyr,bt-hci-spi";
                reg = <0>;
                irq-gpios = <&gpiog 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
                reset-gpios = <&gpiog 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
                spi-max-frequency = <2000000>;
                label = "SPBTLE-RF";
        };
};

^ edit point dts excerpt 4

<i>Excerpt 4 - <i>


^ edit point dts excerpt 5

<i>Excerpt 5 - <i>



^ YAML device bindings files

To support a typical development kit or custom board with multiple peripherals we need a device bindings file comparable to this ... bindings file:

  1. ~/projects-sandbox/workspace-for-rpi/zephyr/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160.yaml
identifier: nrf9160dk_nrf9160
name: nRF9160-DK-NRF9160
type: mcu 
arch: arm 
toolchain:
  - gnuarmemb
  - xtools
  - zephyr
ram: 88
flash: 256 
supported:
  - arduino_gpio
  - arduino_i2c
  - gpio
  - i2c
  - pwm
  - spi
  - watchdog
  - counter


Retrieved from "https://wiki.neelanurseries.com/index.php?title=Spi_device_tree_source_code&oldid=6388"