Difference between revisions of "Nxp chip library routines"

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m (→‎^ LPC_GPIO_TYPEDEF)
m (→‎Using Timers As Pulsewidth Modulators)
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./io_tmr32b1.h:31:void IO_TMR32B1_StartPWM(uint32_t resolution);
 
./io_tmr32b1.h:31:void IO_TMR32B1_StartPWM(uint32_t resolution);
 
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Finding 1:
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    1493 static con_ret_t Cmd_SetPWMLevel(char *pLine)
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Revision as of 22:44, 26 October 2018

CMSIS Library Routines and Details,
LPC1xxx Board Routines
notes started 2018-10-25 THU


LPC11U14 board routines . . .


First search, looking for how NXP demo toggles a given GPIO: 

user:~/Downloads/nxp/lpcopen$ grep -nr Board_LED_Toggle ./*

./nxp_lpcxpresso_11u14_board_lib/src/board.c:137:void Board_LED_Toggle(uint8_t LEDNumber)
./nxp_lpcxpresso_11u14_board_lib/inc/board_api.h:112:void Board_LED_Toggle(uint8_t LEDNumber);
./nxp_lpcxpresso_11u14_periph_clkout/example/src/clkout.c:77:		Board_LED_Toggle(0);
./nxp_lpcxpresso_11u14_periph_pinint/example/src/pinint.c:187:		Board_LED_Toggle(0);
./nxp_lpcxpresso_11u14_periph_uart/example/src/uart.c:135:				Board_LED_Toggle(0);/* Toggle LED if the TX FIFO is full */
./nxp_lpcxpresso_11u14_periph_watchdog/example/src/watchdog.c:65:		Board_LED_Toggle(0);
./nxp_lpcxpresso_11u14_periph_watchdog/example/src/watchdog.c:72:	Board_LED_Toggle(0);

The routine itself in file ~/Downloads/nxp/lpcopen/nxp_lpcxpresso_11u14_board_lib/src/board.c: 

    137 void Board_LED_Toggle(uint8_t LEDNumber)
    138 {^M
    139         if (LEDNumber == 0)^M
    140                 Chip_GPIO_SetPinToggle(LPC_GPIO, 0, 7);
    141 }

Next search: 

$ grep -nr Chip_GPIO_SetPinToggle ./*

user:~/Downloads/nxp/lpcopen$ grep -nr Chip_GPIO_SetPinToggle ./*
./lpc_chip_11uxx_lib/inc/gpio_11xx_1.h:447:STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
Binary file ./nxp_lpcxpresso_11u14_board_lib/src/.board.c.swp matches
./nxp_lpcxpresso_11u14_board_lib/src/board.c:140:		Chip_GPIO_SetPinToggle(LPC_GPIO, 0, 7);

And the lower level routine itself in file ./lpc_chip_11uxx_lib/inc/gpio_11xx_1.h: 

    438 /**^M
    439  * @brief       Toggle an individual GPIO output pin to the opposite state^M
    440  * @param       pGPIO   : The base of GPIO peripheral on the chip^M
    441  * @param       port    : GPIO Port number where @a pin is located^M
    442  * @param       pin             : pin number (0..n) to toggle^M
    443  * @return      None^M
    444  * @note        Any bit set as a '0' will not have it's state changed. This only^M
    445  * applies to ports configured as an output.^M
    446  */^M
    447 STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)^M
    448 {^M
    449         pGPIO->NOT[port] = (1 << pin);^M
    450 }^M

So where is pGPIO defined?


^ LPC_GPIO_TYPEDEF

$ pwd

.../Firmware/V1_1$

$ grep -nr LPC_GPIO_TypeDef ./* | grep LPC11

./LPC11xx.h:295:} LPC_GPIO_TypeDef;
./LPC11xx.h:490:#define LPC_GPIO0             ((LPC_GPIO_TypeDef   *) LPC_GPIO0_BASE )
./LPC11xx.h:491:#define LPC_GPIO1             ((LPC_GPIO_TypeDef   *) LPC_GPIO1_BASE )
./LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
./LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )
Binary file ./Release/Obj/sysconfig_LPC11xx.pbi matches
./initial-firmware-works/Unit_Test/apptask/LPC11xx.h:192:} LPC_GPIO_TypeDef;
./initial-firmware-works/Unit_Test/apptask/LPC11xx.h:204:extern LPC_GPIO_TypeDef gpio;
./initial-firmware-works/Unit_Test/px3_system/LPC11xx.h:192:} LPC_GPIO_TypeDef;
./initial-firmware-works/Unit_Test/px3_system/LPC11xx.h:204:extern LPC_GPIO_TypeDef gpio;
./initial-firmware-works/FloatingPoint/LPC11xx.h:295:} LPC_GPIO_TypeDef;
./initial-firmware-works/FloatingPoint/LPC11xx.h:490:#define LPC_GPIO0             ((LPC_GPIO_TypeDef   *) LPC_GPIO0_BASE )
./initial-firmware-works/FloatingPoint/LPC11xx.h:491:#define LPC_GPIO1             ((LPC_GPIO_TypeDef   *) LPC_GPIO1_BASE )
./initial-firmware-works/FloatingPoint/LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
./initial-firmware-works/FloatingPoint/LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:295:} LPC_GPIO_TypeDef;
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:490:#define LPC_GPIO0             ((LPC_GPIO_TypeDef   *) LPC_GPIO0_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:491:#define LPC_GPIO1             ((LPC_GPIO_TypeDef   *) LPC_GPIO1_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )


Using Timers As Pulsewidth Modulators

./io_tmr16b1.c:89:// Enable/disable interrupts for PWM:
./io_tmr16b1.h:9:    Using this driver for PWM:
./io_tmr16b1.h:13:    3) Reset the PWM system by calling IO_TMR16B1_ResetPWM(),
./io_tmr16b1.h:14:    4) Enable PWM channels by calling IO_TMR16B1_EnablePWM(),
./io_tmr16b1.h:15:    5) Start PWM by calling IO_TMR16B1_StartPWM() and supplying
./io_tmr16b1.h:17:    6) Set and change the PWM level by calling IO_TMR16B1_SetPwmLevel().
./io_tmr16b1.h:19:    When a match register matches (during PWM, for example), a
./io_tmr16b1.h:43:void IO_TMR16B1_EnablePWM(tmr16b1_chan_t chan);
./io_tmr16b1.h:44:void IO_TMR16B1_ResetPWM(void);
./io_tmr16b1.h:45:void IO_TMR16B1_StartPWM(uint16_t resolution);
./io_tmr32b0.c:46:    // Configure PWM output on channels 0, 1, or 2.
./io_tmr32b0.c:49:void IO_TMR32B0_EnablePWM(tmr32b0_chan_t chan)
./io_tmr32b0.c:53:        case TMR32B0_CHAN_0: LPC_TMR32B0->PWMC |= TMR_PWM_ENA_MR0; break;
./io_tmr32b0.c:54:        case TMR32B0_CHAN_1: LPC_TMR32B0->PWMC |= TMR_PWM_ENA_MR1; break;
./io_tmr32b0.c:55:        case TMR32B0_CHAN_2: LPC_TMR32B0->PWMC |= TMR_PWM_ENA_MR2; break;
./io_tmr32b0.c:60:    // Configure PWM output on channels 0, 1, or 2.
./io_tmr32b0.c:63:void IO_TMR32B0_ResetPWM(void)
./io_tmr32b0.c:65:    LPC_TMR32B0->PWMC = 0;
./io_tmr32b0.c:69:void IO_TMR32B0_StartPWM(uint32_t resolution)
./io_tmr32b0.c:83:// Enable/disable interrupts for PWM:
./io_tmr32b0.h:29:void IO_TMR32B0_EnablePWM(tmr32b0_chan_t chan);
./io_tmr32b0.h:30:void IO_TMR32B0_ResetPWM(void);
./io_tmr32b0.h:31:void IO_TMR32B0_StartPWM(uint32_t resolution);
./io_tmr32b1.c:45:    // Configure PWM output on channels 0, 1, or 2.
./io_tmr32b1.c:48:void IO_TMR32B1_EnablePWM(tmr32b1_chan_t chan)
./io_tmr32b1.c:52:        case TMR32B1_CHAN_0: LPC_TMR32B1->PWMC |= TMR_PWM_ENA_MR0; break;
./io_tmr32b1.c:53:        case TMR32B1_CHAN_1: LPC_TMR32B1->PWMC |= TMR_PWM_ENA_MR1; break;
./io_tmr32b1.c:54:        case TMR32B1_CHAN_2: LPC_TMR32B1->PWMC |= TMR_PWM_ENA_MR2; break;
./io_tmr32b1.c:59:    // Configure PWM output on channels 0, 1, or 2.
./io_tmr32b1.c:62:void IO_TMR32B1_ResetPWM(void)
./io_tmr32b1.c:64:    LPC_TMR32B1->PWMC = 0;
./io_tmr32b1.c:68:void IO_TMR32B1_StartPWM(uint32_t resolution)
./io_tmr32b1.c:82:// Enable/disable interrupts for PWM:
./io_tmr32b1.h:29:void IO_TMR32B1_EnablePWM(tmr32b1_chan_t chan);
./io_tmr32b1.h:30:void IO_TMR32B1_ResetPWM(void);
./io_tmr32b1.h:31:void IO_TMR32B1_StartPWM(uint32_t resolution);


Finding 1: 

   1493 static con_ret_t Cmd_SetPWMLevel(char *pLine)



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