Nxp chip library routines - Revision history

Ted at 20:57, 31 October 2018

2018-10-31T20:57:34Z

Ted at 21:02, 30 October 2018

2018-10-30T21:02:58Z

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T23:12:47Z

Using Timers As Pulsewidth Modulators

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T23:08:20Z

Using Timers As Pulsewidth Modulators

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T23:04:54Z

Using Timers As Pulsewidth Modulators

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T23:02:15Z

Using Timers As Pulsewidth Modulators

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T23:01:34Z

Using Timers As Pulsewidth Modulators

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T22:59:18Z

Using Timers As Pulsewidth Modulators

Ted: /* Using Timers As Pulsewidth Modulators */

2018-10-26T22:44:28Z

Using Timers As Pulsewidth Modulators

Ted: /* ^ LPC_GPIO_TYPEDEF */

2018-10-26T22:37:37Z

^ LPC_GPIO_TYPEDEF

← Older revision		Revision as of 20:57, 31 October 2018
Line 326:		Line 326:

	</pre>		</pre>
		+
		+
		+
		+	2018-10-31
		+
		+	How do these signal routines from source file drivers.c affect firmware operation? They all appear to be empty routines, without any statements to execute:
		+
		+	<pre>
		+	265 //*********************************************************************^M
		+	266 // Timer Signals^M
		+	267 //* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *^M
		+	268 ^M
		+	269 #if(CFG_ENABLE_TIMER_16B0 != 0)^M
		+	270 void Signal_TMR16B0_MAT0_Interrupt(void){}^M
		+	271 void Signal_TMR16B0_MAT1_Interrupt(void){}^M
		+	272 void Signal_TMR16B0_MAT2_Interrupt(void){}^M
		+	273 void Signal_TMR16B0_MAT3_Interrupt(void){}^M
		+	274 #endif^M
		+	275 ^M
		+	276 #if(CFG_ENABLE_TIMER_16B1 != 0)^M
		+	277 void Signal_TMR16B1_MAT0_Interrupt(void){}^M
		+	278 void Signal_TMR16B1_MAT1_Interrupt(void){}^M
		+	279 void Signal_TMR16B1_MAT2_Interrupt(void){}^M
		+	280 void Signal_TMR16B1_MAT3_Interrupt(void){}^M
		+	281 #endif^M
		+	282 ^M
		+	283 #if(CFG_ENABLE_TIMER_32B0 != 0)^M
		+	284 void Signal_TMR32B0_MAT0_Interrupt(void){}^M
		+	285 void Signal_TMR32B0_MAT1_Interrupt(void){}^M
		+	286 void Signal_TMR32B0_MAT2_Interrupt(void){}^M
		+	287 void Signal_TMR32B0_MAT3_Interrupt(void){}^M
		+	288 #endif^M
		+	289 ^M
		+	290 #if(CFG_ENABLE_TIMER_32B1 != 0)^M
		+	291 void Signal_TMR32B1_MAT0_Interrupt(void){}^M
		+	292 void Signal_TMR32B1_MAT1_Interrupt(void){}^M
		+	293 void Signal_TMR32B1_MAT2_Interrupt(void){}^M
		+	294 void Signal_TMR32B1_MAT3_Interrupt(void){}^M
		+	295 #endif^M
		+	</pre>
		+
		+

	-->		-->

← Older revision		Revision as of 21:02, 30 October 2018
Line 308:		Line 308:
	</pre>		</pre>

		+
		+	<pre>
		+
		+	In file <code>io_conf_lqfp48.c</code>:
		+
		+	LPC_IOCON->PIO1_1 = P1_1_CONFIG \| A2D_RESERVED;
		+
		+
		+	In file <code>io_def_0C.h</code>:
		+
		+	#define P1_1_CONFIG IO_CONFIG(P1_1, FUNC_CT32B1_MAT0, MODE_FLOAT, HYST_DIS)
		+
		+
		+	In file <code>io_conf_lqfp48.h</code>:
		+
		+	#define IO_CONFIG(PORT, FUNC, MODE, HYST) (FUNC ## _ ## PORT \| MODE \| HYST)
		+
		+	</pre>

	-->		-->

← Older revision		Revision as of 23:12, 26 October 2018
Line 270:		Line 270:
	1019 grep -n IO_TMR32B1_SetPwmLevel ./*		1019 grep -n IO_TMR32B1_SetPwmLevel ./*
	1020 history		1020 history
		+
		+
		+	Finding 6:
		+
		+	<pre>
		+	252 void IO_TMR32B1_SetPwmLevel(tmr32b1_chan_t chan, float duty)^M
		+	253 {^M
		+	254 uint32_t counts;^M
		+	255 ^M
		+	256 // Convert float duty cycle to integer counts for the counter/^M
		+	257 // timer.^M
		+	258 counts = (uint32_t)(duty * mResolution);^M
		+	259 ^M
		+	260 // Counter counts the other way, so invert.^M
		+	261 counts = mResolution - counts;^M
		+	262 ^M
		+	263 // CON_TxChar(' ');^M
		+	264 // CON_TxHexWord((uint16_t)counts);^M
		+	265 ^M
		+	266 switch(chan)^M
		+	267 {^M
		+	268 case TMR32B1_CHAN_0:^M
		+	269 LPC_TMR32B1->MR0 = counts;^M
		+	270 break;^M
		+	271 ^M
		+	272 case TMR32B1_CHAN_1:^M
		+	273 LPC_TMR32B1->MR1 = counts;^M
		+	274 break;^M
		+	275 ^M
		+	276 case TMR32B1_CHAN_2:^M
		+	277 LPC_TMR32B1->MR2 = counts;^M
		+	278 break;^M
		+	279 ^M
		+	280 default: FATAL(0); break;^M
		+	281 }^M
		+	282 }^M
		+	</pre>

← Older revision		Revision as of 23:08, 26 October 2018
Line 219:		Line 219:
	</pre>		</pre>

		+	Finding 5:
		+
		+	<pre>
		+	461 void Signal_APP_SetOutputCurrentDac(float level)^M
		+	462 {^M
		+	463 # if(CFG_PWM_REF_ENABLE != 0)^M
		+	464 PollPwmReference();^M
		+	465 level = CalibratePwmToReference(level);^M
		+	466 # endif^M
		+	467 IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, level);^M
		+	468 // Reflect it in tester registers.^M
		+	469 CON_SetOutputCurrentDutyCycle(level);^M
		+	470 }^M
		+	</pre>
		+
		+	veris@alta-spare-6:~/alta/pressure/px3/tags/Firmware/V1_1$ grep -n IO_TMR32B1_SetPwmLevel ./*
		+	grep: ./IAR_Debug: Is a directory
		+	grep: ./IAR_Release: Is a directory
		+	grep: ./Release: Is a directory
		+	./console.c:642: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, STARTUP_PWM_VALUE);
		+	./console.c:643: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, STARTUP_PWM_VALUE);
		+	./console.c:646: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, 0.9F);
		+	./console.c:647: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, STARTUP_PWM_VALUE);
		+	./console.c:774: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, 0.50F);
		+	./console.c:775: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, 0.50F);
		+	./drivers.c:358: IO_TMR32B1_SetPwmLevel((tmr32b1_chan_t)chan, level);
		+	./drivers.c:467: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, level);
		+	./drivers.c:478: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, level);
		+	grep: ./initial-firmware-works: Is a directory
		+	./io_tmr32b1.c:252:void IO_TMR32B1_SetPwmLevel(tmr32b1_chan_t chan, float duty)
		+	./io_tmr32b1.h:48:void IO_TMR32B1_SetPwmLevel(tmr32b1_chan_t chan, float duty);
		+
		+
		+	History:
		+
		+	1005 grep -n IO_TriStateSet ./.
		+	1006 grep -n P0_7_DEFAULT ./*
		+	1007 grep -n P0_7_DIR ./*
		+	1008 grep -n DIR_INPUT ./*
		+	1009 grep -n DIR_OUTPUT ./* \| grep define
		+	1010 locate UM10
		+	1011 locate LPC1114-UM
		+	1012 ls
		+	1013 grep -n ADC ./*
		+	1014 grep -n PWMC ./*
		+	1015 grep -n PWM ./*
		+	1016 kkkkkkkkk
		+	1017 grep -n OUTPUT ./*
		+	1018 grep -n Signal_APP_SetOutputCurrentDac ./*
		+	1019 grep -n IO_TMR32B1_SetPwmLevel ./*
		+	1020 history

@@ Line 203: / Line 203: @@
      }^M
 </pre>
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@@ Line 104: / Line 104: @@
 == Using Timers As Pulsewidth Modulators ==
 <!--
@@ Line 172: / Line 174: @@
 </pre>
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@@ Line 105: / Line 105: @@
 == Using Timers As Pulsewidth Modulators ==
 <pre>
 ./io_tmr16b1.c:89:// Enable/disable interrupts for PWM:
@@ Line 170: / Line 171: @@
 ./drivers.h:324:#   define ANALOG_OUTPUT_CFG        CFG_DAC_TMR32B1   // uC PWM/DAC output
 </pre>
 <!-- comment -->

← Older revision		Revision as of 22:59, 26 October 2018
Line 149:		Line 149:
	1493 static con_ret_t Cmd_SetPWMLevel(char *pLine)		1493 static con_ret_t Cmd_SetPWMLevel(char *pLine)

		+	Finding 2:

		+	<pre>./apptask.c:1100: if(OUTPUT_IS_MILLIAMP)
		+	./con_eeprom.h:23:#define OUTPUT_IS_VOLT ((EEP_GetSelectedSwitchImage() & DIP_MA) == 0)
		+	./con_eeprom.h:24:#define OUTPUT_IS_MILLIAMP ((EEP_GetSelectedSwitchImage() & DIP_MA) != 0)
		+	./con_tester.c:196: (void *)ANALOG_OUTPUT_VOLT_CHANNEL, 0, DacWrite, NullRead},
		+	./con_tester.c:198: (void *)ANALOG_OUTPUT_MA_CHANNEL, 0, DacWrite, NullRead},
		+	./console.c:634: IO_TMR32B1_Reset(ANALOG_OUTPUT_PRESCALER);
		+	./console.c:636: IO_TMR32B1_EnablePWM(ANALOG_OUTPUT_MA_CHANNEL);
		+	./console.c:637: IO_TMR32B1_EnablePWM(ANALOG_OUTPUT_VOLT_CHANNEL);
		+	./console.c:638: IO_TMR32B1_StartPWM(ANALOG_OUTPUT_RESOLUTION);
		+	./console.c:642: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, STARTUP_PWM_VALUE);
		+	./console.c:643: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, STARTUP_PWM_VALUE);
		+	./console.c:646: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, 0.9F);
		+	./console.c:647: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, STARTUP_PWM_VALUE);
		+	./console.c:774: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, 0.50F);
		+	./console.c:775: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, 0.50F);
		+	./drivers.c:467: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_MA_CHANNEL, level);
		+	./drivers.c:478: IO_TMR32B1_SetPwmLevel(ANALOG_OUTPUT_VOLT_CHANNEL, level);
		+	./drivers.h:324:# define ANALOG_OUTPUT_CFG CFG_DAC_TMR32B1 // uC PWM/DAC output
		+	</pre>


	<!-- comment -->		<!-- comment -->

@@ Line 143: / Line 143: @@
 ./io_tmr32b1.h:31:void IO_TMR32B1_StartPWM(uint32_t resolution);
 </pre>
 <!-- comment -->

@@ Line 98: / Line 98: @@
 ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:492:#define LPC_GPIO2             ((LPC_GPIO_TypeDef   *) LPC_GPIO2_BASE )
 ./initial-firmware-works/Obsolete (FixedPoint)/LPC11xx.h:493:#define LPC_GPIO3             ((LPC_GPIO_TypeDef   *) LPC_GPIO3_BASE )
 </pre>
 <!-- comment -->