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	<id>https://wiki.neelanurseries.com/index.php?action=history&amp;feed=atom&amp;title=Cflow</id>
	<title>Cflow - Revision history</title>
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	<updated>2026-04-23T11:41:03Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
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	<entry>
		<id>https://wiki.neelanurseries.com/index.php?title=Cflow&amp;diff=8455&amp;oldid=prev</id>
		<title>Ted: Create page for cflow utility, add example use on STM32 clock init code.</title>
		<link rel="alternate" type="text/html" href="https://wiki.neelanurseries.com/index.php?title=Cflow&amp;diff=8455&amp;oldid=prev"/>
		<updated>2025-08-25T05:34:05Z</updated>

		<summary type="html">&lt;p&gt;Create page for cflow utility, add example use on STM32 clock init code.&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;Cflow can trace routine call frames, can follow all routine calls neglecting whether tests would skip the calls at run time.  Useful for seeing which execution paths could possibly be called.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ted@localhost:~/projects/zephyr-project/zephyr/drivers$ cflow -m stm32_clock_control_init ~/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:99: plln_mul redefined&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:94: this is the place of previous definition&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:99: pllout_div redefined&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:95: this is the place of previous definition&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:107: __unused redefined&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:91: this is the place of previous definition&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:530: __unused redefined&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:107: this is the place of previous definition&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:548: __unused redefined&lt;br /&gt;
cflow:/home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:530: this is the place of previous definition&lt;br /&gt;
stm32_clock_control_init() &amp;lt;int stm32_clock_control_init (const struct device *dev) at /home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:825&amp;gt;:&lt;br /&gt;
    ARG_UNUSED()&lt;br /&gt;
    config_enable_default_clocks()&lt;br /&gt;
    config_regulator_voltage() &amp;lt;void __weak config_regulator_voltage (uint32_t hclk_freq) at /home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:934&amp;gt;&lt;br /&gt;
    RCC_CALC_FLASH_FREQ()&lt;br /&gt;
    HAL_RCC_GetSysClockFreq()&lt;br /&gt;
    GET_CURRENT_FLASH_PRESCALER()&lt;br /&gt;
    LL_SetFlashLatency()&lt;br /&gt;
    set_up_fixed_clock_sources() &amp;lt;void set_up_fixed_clock_sources (void) at /home/ted/projects/zephyr-project/zephyr/drivers/clock_control/clock_stm32_ll_common.c:636&amp;gt;:&lt;br /&gt;
        IS_ENABLED()&lt;br /&gt;
        LL_RCC_HSE_EnableBypass()&lt;br /&gt;
        LL_RCC_HSE_DisableBypass()&lt;br /&gt;
        LL_RCC_HSE_EnableTcxo()&lt;br /&gt;
        LL_RCC_HSE_EnableDiv2()&lt;br /&gt;
        LL_RCC_HSE_Enable()&lt;br /&gt;
        LL_RCC_HSE_IsReady()&lt;br /&gt;
        z_arm_nmi_set_handler()&lt;br /&gt;
        LL_RCC_HSE_EnableCSS()&lt;br /&gt;
        LL_RCC_HSI_IsReady()&lt;br /&gt;
        LL_RCC_HSI_Enable()&lt;br /&gt;
        LL_RCC_SetHSIDiv()&lt;br /&gt;
        hsi_divider()&lt;br /&gt;
        LL_RCC_MSI_EnableRangeSelection()&lt;br /&gt;
        LL_RCC_MSI_SetRange()&lt;br /&gt;
        LL_RCC_MSI_EnablePLLMode()&lt;br /&gt;
        LL_RCC_MSI_SetCalibTrimming()&lt;br /&gt;
        LL_RCC_MSI_IsReady()&lt;br /&gt;
        LL_RCC_MSI_Enable()&lt;br /&gt;
        LL_RCC_LSI1_Enable()&lt;br /&gt;
        LL_RCC_LSI1_IsReady()&lt;br /&gt;
        LL_RCC_LSI_Enable()&lt;br /&gt;
        LL_RCC_LSI_IsReady()&lt;br /&gt;
        z_stm32_hsem_lock()&lt;br /&gt;
        stm32_backup_domain_enable_access()&lt;br /&gt;
        LL_RCC_LSE_SetDriveCapability()&lt;br /&gt;
        LL_RCC_LSE_EnableBypass()&lt;br /&gt;
        LL_RCC_LSE_Enable()&lt;br /&gt;
        LL_RCC_LSE_IsReady()&lt;br /&gt;
        LL_RCC_LSE_EnablePropagation()&lt;br /&gt;
        LL_RCC_LSE_IsPropagationReady()&lt;br /&gt;
        stm32_backup_domain_disable_access()&lt;br /&gt;
        z_stm32_hsem_unlock()&lt;br /&gt;
        LL_RCC_HSI14_Enable()&lt;br /&gt;
        LL_RCC_HSI14_IsReady()&lt;br /&gt;
        LL_APB2_GRP1_EnableClock()&lt;br /&gt;
        LL_SYSCFG_VREFINT_EnableHSI48()&lt;br /&gt;
        LL_RCC_HSI48_Enable()&lt;br /&gt;
        LL_RCC_HSI48_IsReady()&lt;br /&gt;
    set_up_plls()&lt;br /&gt;
    DT_PROP()&lt;br /&gt;
    DT_NODELABEL()&lt;br /&gt;
    ahb_prescaler()&lt;br /&gt;
    MHZ()&lt;br /&gt;
    LL_RCC_SetAHBPrescaler()&lt;br /&gt;
    LL_RCC_SetSysClkSource()&lt;br /&gt;
    LL_RCC_GetSysClkSource()&lt;br /&gt;
    stm32_clock_switch_to_hsi()&lt;br /&gt;
    LL_RCC_SetAPB1Prescaler()&lt;br /&gt;
    apb1_prescaler()&lt;br /&gt;
    LL_RCC_SetAPB2Prescaler()&lt;br /&gt;
    apb2_prescaler()&lt;br /&gt;
    LL_C2_RCC_SetAHBPrescaler()&lt;br /&gt;
    LL_RCC_SetAHB3Prescaler()&lt;br /&gt;
    LL_RCC_SetAHB4Prescaler()&lt;br /&gt;
    LL_RCC_SetADCClockSource()&lt;br /&gt;
    adc12_prescaler()&lt;br /&gt;
    adc34_prescaler()&lt;br /&gt;
ted@localhost:~/projects/zephyr-project/zephyr/drivers$&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;/div&gt;</summary>
		<author><name>Ted</name></author>
	</entry>
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