Bootloading - Revision history

Ted: Eseye note.

2025-09-12T16:06:34Z

Eseye note.

Ted: Add at+cimi;+cops?;+creg?;+cereg?;+cgreg?;+QNWINFO;+QENG="servingcell";+CGDCONT?;+CGPADDR.

2025-01-29T19:56:06Z

Add at+cimi;+cops?;+creg?;+cereg?;+cgreg?;+QNWINFO;+QENG="servingcell";+CGDCONT?;+CGPADDR.

Ted: /* ^ RP2040 bootloaders */ add link to Hunter Adams RP2040 bootloader project.

2024-07-22T19:41:31Z

^ RP2040 bootloaders: add link to Hunter Adams RP2040 bootloader project.

Ted: /* ^ STMicro bootloaders */

2022-09-01T07:31:54Z

^ STMicro bootloaders

Ted: /* ^ STMicro bootloaders */ updating output excerpt from python script talking to ST bootloader on Nucleo-WL55JC2 board.

2022-09-01T07:28:04Z

^ STMicro bootloaders: updating output excerpt from python script talking to ST bootloader on Nucleo-WL55JC2 board.

Ted: /* ^ STMicro bootloaders */ - add excerpt from first acknowledge byte from ST bootloader, value 0x79 or 'y'.

2022-09-01T06:03:34Z

^ STMicro bootloaders: - add excerpt from first acknowledge byte from ST bootloader, value 0x79 or 'y'.

Ted: /* ^ STMicro bootloaders */

2022-09-01T03:34:39Z

^ STMicro bootloaders

Ted: /* ^ STMicro bootloaders */

2022-08-31T05:07:05Z

^ STMicro bootloaders

Ted: /* ^ STMicro bootloaders */

2022-08-31T04:49:36Z

^ STMicro bootloaders

Ted: /* ^ STMicro bootloaders */

2022-08-30T21:53:17Z

^ STMicro bootloaders

← Older revision		Revision as of 16:06, 12 September 2025
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	* https://forum.arduino.cc/t/bootloader-differences/274747/3		* https://forum.arduino.cc/t/bootloader-differences/274747/3
		+
		+	<!-- https://www.dropbox.com/scl/fo/m99qwumgdsg47z9em1pk7/h?oref=e&r=ACIWifyzTuMTSTouyjCmxON3a2UmAC0mITQp51-qSnqOaY0tfNYCR8hx4R_xQ-lFxlVM8y2Z--GsP_Kz4N-xbk8Sj6dZ5AA0KRDt64Z5HLp__gT8LMrAREkV8pI-VTxoXCRmJYpse7qHHnv_FjZ9r2GshI4IPVZioJy-MUWvHpE8wpcgM-wc9UJzVtJ93An8AoicE-L1jRWxWvtkekRSn3-S&sm=1&dl=0 -->

	<!--		<!--

← Older revision		Revision as of 19:56, 29 January 2025
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	* https://forum.arduino.cc/t/bootloader-differences/274747/3		* https://forum.arduino.cc/t/bootloader-differences/274747/3

		+	<!--
		+	at+cimi;+cops?;+creg?;+cereg?;+cgreg?;+QNWINFO;+QENG="servingcell";+CGDCONT?;+CGPADDR
		+	-->

	<!-- EOF -->		<!-- EOF -->

@@ Line 139: / Line 139: @@
 == [[#top|^]] RP2040 bootloaders ==
 *  https://blog.usedbytes.com/2021/12/pico-serial-bootloader/   RP2040 bootloader by Brian Starkey
@@ Line 148: / Line 150: @@
 *  https://github.com/dwelch67/raspberrypi-pico/tree/main/bootloader10 . . . bootloader by dwelch67
 </ul>
 <!-- comentario -->

← Older revision		Revision as of 07:31, 1 September 2022
Line 130:		Line 130:

	</pre>		</pre>
		+
		+	These commands 0x00, 0x01, 0x02, 0x11 and the others through 0xA1 are the same commands listed in ST application note an3155-usart-protocol-used-in-the-stm32-bootloader-stmicroelectronics.pdf on pages 9 and 10. The lower case 'y' has ASCII value 0x79 which is STMicro's bootloader ACK or acknowledge byte. These results show we are talking with the bootloader.
		+
		+	So far for some reason only baud rates 115200 and 230400 succeed. Slower baud rates fail with no response from the MCU to the host.
		+

	<!-- comentario -->		<!-- comentario -->

@@ Line 103: / Line 103: @@
 (serial-work) ted@localhost:~/projects/python/serial-work$ python3 serial-test.py
 Script starting,
 At loop to attempt bootloader handshake several times:
 b'\xff'
 b'y'
 b'\xff'
 b'y'
-b'\xff'
+constructed bootloader command  b'\x00\xff'
 b'y'
-b'\xff'
+b'\x0c'
 b'y'
-b'\xff'
-b'y'
+script done.
-b'\xff'
 </pre>

← Older revision		Revision as of 06:03, 1 September 2022
Line 96:		Line 96:


		+	2022-08-31 WED
		+
		+	Talking to STM32WL55 stage one bootloader via UART:
		+
		+	<pre>
		+	(serial-work) ted@localhost:~/projects/python/serial-work$ python3 serial-test.py
		+	Script starting,
		+	writing 0x7f to serial port . . .
		+
		+
		+	At loop to attempt bootloader handshake several times:
		+	b'y'
		+	b'\x1f'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	b'\xff'
		+	b'y'
		+	At original loop designed to read serial port received bytes:
		+	b'\xff'
		+	b'\xff'
		+	b'\xff'
		+	</pre>

	<!-- comentario -->		<!-- comentario -->

← Older revision		Revision as of 03:34, 1 September 2022
Line 36:		Line 36:

	== [[#top\|^]] STMicro bootloaders ==		== [[#top\|^]] STMicro bootloaders ==
		+
		+	Serial bootloading on STMicro MCUs, or title of application note AN3155 "USART protocol used in the STM32 bootloader":

	* https://www.st.com/resource/en/application_note/an3155-usart-protocol-used-in-the-stm32-bootloader-stmicroelectronics.pdf		* https://www.st.com/resource/en/application_note/an3155-usart-protocol-used-in-the-stm32-bootloader-stmicroelectronics.pdf

← Older revision		Revision as of 05:07, 31 August 2022
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	. . . which is one of the pins called out in the board level device tree file [zephyr_3p1p0_root]/boards/arm/nucleo_wl55jc.dts, for lpuart1 device node. We want to enable &usart1, and it looks like we'll want to specify RX and TX pins similarly. But where and how is 'lpuart1_tx_pa2' defined?		. . . which is one of the pins called out in the board level device tree file [zephyr_3p1p0_root]/boards/arm/nucleo_wl55jc.dts, for lpuart1 device node. We want to enable &usart1, and it looks like we'll want to specify RX and TX pins similarly. But where and how is 'lpuart1_tx_pa2' defined?
		+
		+	While our question here is not fully answered a chance wildcarding of grep search pattern yields a result which may help. Note 'usart2_tx_pa2' pattern in second to last result:
		+
		+	<pre>
		+	./zephyr-nucleo-wl55jc2/build/zephyr/dev_handles.c:95: * - (/soc/pin-controller@48000000/lpuart1_tx_pa2)
		+	./zephyr-nucleo-wl55jc2/build/zephyr/zephyr.dts.pre:1328: /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 {
		+	./zephyr-nucleo-wl55jc2/build/zephyr/zephyr.dts.pre:1353: /omit-if-no-ref/ usart2_tx_pa2: usart2_tx_pa2 {
		+	./zephyr-nucleo-wl55jc2/build/zephyr/zephyr.dts.pre:1511: pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
		+
		+	ted@localhost:~/projects-sandbox/workspace-for-nucleo-wl55jc2$ grep -nr 'tx.pa2' ./
		+	</pre>
		+
		+	Ok the "omit if no ref" key words or key phrase in device tree must be a qualifier of a defining line, not a test to see whether a node has already been defined:
		+
		+	<pre>
		+	$ grep -nr usart1_tx_p ./* \| grep wl55 \| grep usart1_tx_p
		+	./modules/hal/stm32/dts/st/wl/stm32wl55ccux-pinctrl.dtsi:544: /omit-if-no-ref/ usart1_tx_pa9: usart1_tx_pa9 {
		+	./modules/hal/stm32/dts/st/wl/stm32wl55ccux-pinctrl.dtsi:549: /omit-if-no-ref/ usart1_tx_pb6: usart1_tx_pb6 {
		+	./modules/hal/stm32/dts/st/wl/stm32wl55jcix-pinctrl.dtsi:781: /omit-if-no-ref/ usart1_tx_pa9: usart1_tx_pa9 {
		+	./modules/hal/stm32/dts/st/wl/stm32wl55jcix-pinctrl.dtsi:786: /omit-if-no-ref/ usart1_tx_pb6: usart1_tx_pb6 {
		+	./zephyr/tests/drivers/uart/uart_async_api/boards/nucleo_wl55jc.overlay:11: pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
		+	./zephyr-nucleo-wl55jc2/build/zephyr/zephyr.dts.pre:1333: /omit-if-no-ref/ usart1_tx_pa9: usart1_tx_pa9 {
		+	./zephyr-nucleo-wl55jc2/build/zephyr/zephyr.dts.pre:1338: /omit-if-no-ref/ usart1_tx_pb6: usart1_tx_pb6 {
		+	</pre>
		+
		+

	<!-- comentario -->		<!-- comentario -->

← Older revision		Revision as of 04:49, 31 August 2022
Line 56:		Line 56:
	GND . . . CN5 pin 7 and others		GND . . . CN5 pin 7 and others

		+	2022-08-30 TUE -
		+	Looking for how to enable USART1 on STM32WL55JC. Strange, we see in [our+app]/build/zephyr/zephyr.dts a reference to:
		+
		+	<pre>
		+	179 lpuart1_tx_pa2: lpuart1_tx_pa2 {
		+	180 pinmux = < 0x48 >;
		+	181 bias-pull-up;
		+	182 phandle = < 0x4 >;
		+	183 };
		+	</pre>
		+
		+	. . . which is one of the pins called out in the board level device tree file [zephyr_3p1p0_root]/boards/arm/nucleo_wl55jc.dts, for lpuart1 device node. We want to enable &usart1, and it looks like we'll want to specify RX and TX pins similarly. But where and how is 'lpuart1_tx_pa2' defined?

	<!-- comentario -->		<!-- comentario -->

@@ Line 52: / Line 52: @@
 With the STM32WL55xx Nucleo board, STMicro's AN2606 application notes document says that USART1 is enabled with RX and TX lines assigned to PA10 and PA9 respectively.  These MCU pins map to connectors and connector pins:
-  PA9  . . . CN5 pin 2
+  USART1 TX --> PA9  . . . CN5 pin 2
-  PA10 . . . CN8 pin 3
+  USART1 RX --> PA10 . . . CN8 pin 3
- GND  . . . CN5 pin 7 and others
+               GND  . . . CN5 pin 7 and others